Method of preventing autodoping

ABSTRACT

A method of making a silicon-based electronic device is provided. The method includes, for example, the steps of forming a doped silicon layer on a surface of a substrate material and forming an undoped silicon capping layer on the doped silicon layer. The thin “capping” layers of undoped silicon prevent outgassing of the dopants underneath the cap. In this manner, the next deposition of doped silicon is not subject to autodoping by the previous doped silicon deposition.

FIELD OF THE INVENTION

[0001] The invention relates generally to electronic devices and, moreparticularly, to methods of reducing or eliminating the effects ofautodoping in chemical vapor deposition (hereinafter CVD) processes.

BACKGROUND OF THE INVENTION

[0002] Many steps in integrated circuit (IC) manufacture require thedeposition of thin films of silicon. One method of depositing silicon inthin film form is by low pressure chemical vapor deposition (hereinafterLPCVD). Substrate wafers are heated in a pressure vessel to between 450and 650° C. while atmospheric gases are pumped out. When the pressure inthe vessel generally reaches between 200-600 mTorr and the wafers havereached high temperature, a silicon containing gas such as silane (SiH₄)is flowed into the chamber, resulting in silicon deposition. Excellentcontrol of the thickness of the film, thickness uniformity across awafer, and step coverage (i.e., ability to cover a wafer surface withvaried topography) is achieved by adjusting the temperature, pressure,and gas flow in the pressure vessel.

[0003] However, many steps in integrated circuit manufacture not onlyrequire the deposition of thin films of silicon, but also require thatthe thin film be doped to make it conductive. Doping describesintentionally contaminating the silicon with specific foreign atoms,such as boron or phosphorus. The most common method of doping silicon isby ion implantation. Ion implantation is a process by which foreignatoms are ionized, accelerated by electromagnetic fields, and directedto impact (“implant”) into a target substrate such as silicon. Ionimplantation requires expensive equipment and does not allow for goodcontrol over the concentration depth profile of the dopant.

[0004] Another method of doping silicon thin films is to co-depositdopant atoms while depositing silicon atoms. Precursor gases such asboron trichloride (BCl₃) or phosphine (PH₃) are admitted simultaneouslywith silane (SiH₄) resulting in boron or phosphorus doped silicon films.This process is generally known as “in-situ” doping. In-situ dopingallows for better control of the dopant depth profile concentration inthe silicon film relative to ion implantation. Cost is also reduced assilicon film deposition and doping is done using the same furnace.

[0005] However, one major drawback of in-situ doping is the potentialfor autodoping. Autodoping is the unintentional doping of wafers in avessel caused by the outgassing of dopant atoms in the silicon filmsfrom the previous deposition. When silicon wafers are deposited in anLPCVD method, the vessel and everything inside it (including any dummywafers used for maintaining consistent deposition on product wafers) areall deposited with silicon film and, if any is present, dopant material.The silicon deposition is ubiquitous and indiscriminate on all heatedsurfaces in the pressure vessel.

[0006] Several prior art methods attempt to reduce or eliminate theeffects of autodoping. One such method is to “wet” clean all thecomponents of the LPCVD furnace. This requires shutting down the LPCVDfurnace, removing any product wafers and using a chemical bath to etchaway the doped layers formed on the LPCVD furnace components. Thisprocess is sometimes repeated after every product wafer deposition. Thismethod is highly disadvantageous because LPCVD furnaces are notoriousfor their large overhead times. Overhead time is the time spent by theLPCVD furnace which is not dedicated strictly to product waferdepositions and includes the time to pump down the pressure vessel tolow pressures, the time for the wafers to achieve a uniform processtemperature, the time to cool down the wafers before they can be placedin plastic cassettes, etc. In some cases, the overhead time on LPCVDdeposition sequences is on the order of four or more hours and is,therefore, nontrivial.

[0007] A second method is to “dry” clean all the components of the LPCVDfurnace. This method involves once again effectively shutting down theLPCVD furnace, removing any product wafers and then pumping gaseouscleaning agents into the LPCVD furnace to etch away the doped layersformed therein. This process is also sometimes repeated after everyproduct wafer deposition. This method also suffers from theabove-discussed disadvantageously large overhead times because the LPCVDfurnace must be effectively shut down (e.g., placed in a nonproductiveoperational state) to be cleaned and then restarted for the next productwafer deposition.

[0008] A third method is to run a separate and distinct undopeddeposition process that is unrelated to the product wafer depositionprocess. This method requires removal of the product wafers from thefurnace and then running a separate and distinct undoped depositionprocess to coat all of the surfaces of the LPCVD furnace components(and, if any, dummy wafers). This process is also sometimes repeatedafter every product wafer deposition. Since the product wafers are notin the furnace during this deposition, large overhead times as discussedabove are once again encountered because the LPCVD furnace must beeffectively placed in nonproductive operation and restarted multipletimes before the product wafer depositions can be once again formed.

[0009] Hence, a method of preventing autodoping that does not sufferfrom the aforementioned disadvantages is highly desirable.

SUMMARY OF THE INVENTION

[0010] The present invention employs very thin “capping” layers ofundoped silicon that are deposited on top of the doped silicon layers ofproduct wafers and/or dummy wafers to prevent outgassing of the dopantsunderneath the cap. In this regard, while the undoped capping layers mayhave some dopant in them due to out-gassing and diffusion from the dopedlayer below and the pressure vessel, the amount of dopant present is solow that the next product wafer deposition of doped silicon is notsubject to autodoping by the previous doped silicon deposition.

[0011] According to one embodiment of the present invention, acontinuous method of making a silicon-based electronic device isprovided. The method includes, for example, the steps of forming a dopedsilicon layer on a surface of a substrate material and forming anundoped silicon capping layer on the doped silicon layer. A second dopedsilicon layer may be formed on the undoped silicon layer followed byanother doped silicon capping layer, and so, on. In this manner, theundoped silicon capping layers prevent autodoping from the doped siliconlayers beneath. The entire method is performed via a continuous in-situprocess without having the LPCVD furnace in any nonproductiveoperational states between depositions.

[0012] For example, for a 1000 Å phosphorus-doped (n-type) siliconlayer, an undoped silicon capping layer having a thickness ofapproximately 200 Å or greater is sufficient to reduce the effects ofautodoping to most preferably a substantially background level. Also,for a 1000 Å boron-doped (p-type) silicon layer, an undoped siliconcapping layer having a thickness of approximately 300 Å or greater issufficient to reduce the effects of autodoping to most preferably asubstantially background level.

[0013] Therefore, it is an advantage of the present invention to providea continuous process for forming electronic devices that does not sufferfrom the drawbacks associated with autodoping.

[0014] It is yet another advantage of the present invention to provide amethod of reducing autodoping wherein the capping layer can be used forsubsequent processing such as, for example, the formation of wires oruse during chemo-mechanical polishing (CMP).

[0015] It is still further an advantage of the present invention toprovide a method reducing autodoping to substantially backgroundconcentrations.

[0016] It is still further an advantage of the present invention toprovide a method of fabricating electronic devices with abrupt n andp-type interfaces.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In the accompanying drawings which are incorporated in andconstitute a part of the specification, embodiments of the invention areillustrated, which, together with a general description of the inventiongiven above, and the detailed description given below, serve to examplethe principles of this invention.

[0018] FIGS. 1A-1D illustrate the fabrication of an electronic deviceaccording to the present invention.

[0019]FIG. 2 is a graph illustrating thicknesses of various undopedsilicon capping layers with reference to a 1000 Å phosphorus-doped(n-type) silicon layer.

[0020]FIG. 3 is a graph illustrating thicknesses of various undopedsilicon capping layers with reference to a 1000 Å boron-doped (p-type)silicon layer.

DETAILED DESCRIPTION OF ILLUSTRATED EMBODIMENT

[0021]FIGS. 1A through 1D illustrate a continuous process for forming anelectronic device that prevents or minimizes autodoping. Referring nowto FIG. 1A, a pressure vessel 100 is provided and generally includes atleast two input ports 102 and 104 for the input of various source.gases. As will be described in more detail hereinafter, the source gasesare used to form the deposition layers of the present invention. Thepressure vessel 100 is preferably in the form of a quartz tube. Thepressure vessel 100 further has openings (not shown) for inserting andremoving product and dummy (if any) wafer assemblies and exit ports forpurging the gaseous contents therein. The pressure vessel 100 is alsoconnected to vacuum pumps with valving systems to regulate pressure (notshown). Additionally, the temperature inside the pressure vessel isgenerally controlled by heating elements that surround the vessel, andcan also be controlled by a plasma struck inside the vessel. Thepressure vessel 100 and its contents are inserted into a LPCVD furnacefor deposition of the various layers of the present invention. LPCVDfurnaces are well-known in the art and will not be further discussed.

[0022] A plurality of wafers 108, which may include product wafers orproduct and dummy wafers, are affixed to a boat 106 that is theninserted into the pressure vessel 100. The plurality of wafers 108 arepreferably made of a suitable substrate material 120 for the desiredproduct fabrication. Substrate material 120 is preferably eitheramorphous or crystalline (including single crystal and polycrystalline).Suitable substrate materials 120 include, for example, silicon (Si),silicon dioxide (SiO₂), titanium nitride (TiN), titanium silicide(TiSi₂), cobalt silicide (CoSi₂), aluminum (Al), copper (Cu), tungsten(W), tungsten silicide (WSi₂), and other similar materials.

[0023] Referring now to FIG. 1B, once the wafers 108 are inserted intothe pressure vessel 100, a doped silicon layer 122 is formed on asurface of the substrate material 120. The doped silicon layer 122 ispreferably formed via in-situ doping. In particular, silicon atoms arecodeposited with precursor or dopant atoms on substrate material 120.This is preferably accomplished by appropriately pressurizing andheating pressure vessel 100 and then introducing silane (SiH₄) gas toprovide a source of silicon atoms and a precursor gas having eitherboron trichloride (BCl₃) or phosphine (PH₃). A precursor gas havingboron trochloride (BCl₃) is introduced if the doped silicon layer 122 isto be p-type and a precursor gas having phosphine (PH3) is introduced ifthe doped silicon layer 122 is to be n-type. Hence, doped silicon layer122 can be formed with either n-type or p-type dopants.

[0024] Referring now to FIG. 1C, a capping layer 124 is formed on dopedsilicon layer 122. Capping layer 124 is preferably made by depositingundoped silicon on the surface of doped silicon layer 122. The cappinglayer 124 is also formed on all of the remaining surfaces of wafers 108,pressure vessel 100, and boat 106. In this manner, all surfacespreviously exposed to the in-situ doping process of the first dopedsilicon layer 122 will have a capping layer formed thereon. As will bedescribed in more detail in connection with FIGS. 2 and 3, the formationof a capping layer 124 on all of the previously exposed surfacesreducing the autodoping effect to preferably substantially backgroundlevels. In this regard, the formation of capping layer 124 is preferablyaccomplished by discontinuing the introduction of the precursor gashaving either boron trichloride (BCl₃) or phosphine (PH₃), whilecontinuing the introduction of the silane gas (SiH₄). The continuedintroduction of the silane gas (SiH₄) in the absence of any precursorgases forms an undoped silicon capping layer 124 on all of the exposedsurfaces in the pressure vessel including doped silicon layer 122. Thecontinued introduction of silane gas (SiH₄) is maintained until thecapping layer 124 has formed an appropriate thickness to reduce theeffects of autodoping. Effective thickness ranges are discussed inconnection with FIGS. 2 and 3, infra.

[0025] Referring now to FIG. 1D, a second doped silicon layer 126 mayformed on capping layer 124. Similar to doped silicon layer 122, thesecond doped silicon layer 126 is also preferably formed via in-situdoping. More specifically, the second doped silicon layer can be formedby once again introducing a precursor gas into the pressure vessel 100,while continuing to introduce silane gas (SiH₄). As described above, theprecursor gas can have either boron trichloride (BCl3) or phosphine(PH3) therein to provide p-type or n-type dopants, respectively. In thisregard doped silicon layers 122 and 126 can have opposite dopantcharacteristics. For example, if doped silicon layer 122 is formed usingp-type dopant atoms (i.e., boron), then doped silicon layer 126 can beformed using n-type dopant atoms (i.e., phosphorus), or vice-versa.

[0026] The process shown and described in FIGS. 1A through 1D can befurther repeated to build addition layers on top of second doped siliconlayer 126. For example, once second doped silicon layer 126 is formed, asecond capping layer similar to capping layer 124 can be formed thereonby once again discontinuing the introduction of the precursor gas, whilecontinuing the introduction of the silane gas (SiH₄). A third dopedsilicon layer, which can be either p or n-type, can then be formed onthe second capping layer by the above described processes, and so on. Inthis regard, the undoped silicon capping layer formed between two dopedsilicon layers is thin enough to reduce the effects of autodoping whilemaintaining the respective doped silicon layers in operativecommunication with each other. The term operative communication isdefined herein to mean that the drift and diffusion mechanisms by whichholes and electrons move through a silicon structure are operative andnot substantially diminished. Hence, an undoped silicon capping layeraccording to the present invention between, for example, an n-type dopedsilicon layer and a p-type doped silicon layer does not substantiallydiminish the drift and diffusion characteristics necessary to preservethe operability of a junction formed between the p and n-type dopedsilicon layers.

[0027] Hence, an efficient continuous process of forming a semiconductordevice having different types and/or concentrations of dopants but usinga single furnace is possible because the capping layer 124 forms anautodoping barrier on all surfaces that have thereon one or more exposeddoped silicon layers that may be the source of any autodoping atoms.

[0028] Referring now generally to FIGS. 2 and 3, the present discussionwill focus on the thickness requirements of the undoped silicon cappinglayer of the present invention. The following procedure was used todetermine the thickness of an undoped silicon capping layer necessary toprevent autodoping in the case of boron and phosphorus dopant atoms. Inthis regard, silicon wafers with 1000 Å of thermally grown SiO₂ werefirst prepared as test substrates. Prior to deposition on the testwafers, a full load of 150 dummy wafers was deposited with eitherheavily phosphorus or boron-doped silicon films 1000 Å thick. Dopingconcentrations were determined from previous depositions byconcentration depth profiling by secondary ion mass spectrometry, orSIMS. The doping concentration in either phosphorus or boron-doped filmswas approximately 1×10²⁰ atoms/cm³. After the first doped silicondeposition on the dummy wafers only (no test wafers), which alsoresulted in deposition on the quartz tube and boat, a second undopedsilicon deposition of approximately 1500 Å thick on test and dummywafers followed. By depth profiling the concentration of dopant in thesecond film on the test wafer, the extent of autodoping was established.The doped silicon depositions on the dummy wafers were then “capped”with undoped silicon by turning off the flow of precursor or dopantgases while continuing the flow of silane (SiH₄) gas for a brief time.The thickness of the undoped capping layer was determined by thedeposition rate and are illustrated in, for example, FIGS. 2 and 3. Theactual thicknesses and, therefore, deposition rates were determined byspectroscopic ellipsometry. By repeating this sequence of: (1)depositing a doped silicon layer followed by an undoped silicon cappinglayer on dummy wafers, and (2) depositing undoped silicon layers on testwafers, the same test wafer can have many sequenced deposition layersand the extent of autodoping in each layer can be determined.

[0029] Referring now to more specifically to FIG. 2, the results ofcapping phosphorus-doped (n-type) silicon depositions will now bediscussed. In this regard, amorphous silicon doped to 1×10²⁰ atoms/cm³phosphorus was deposited at 550° C. by flowing 500 sccm (standard cubiccentimeters) of SiH₄ and 32 sccm of 0.5% PH₃ diluted in He with 380 sccmof He carrier gas. Pressure in the tube was 400 mTorr and the resultingdeposition rate was approximately 19.3 Å/minute. Undoped silicon wasdeposited at 550° C. by flowing 500 sccm of SiH₄ at 400 mTorr, and theresulting deposition rate was approximately 21.7 Å/minute. The resultingSIMS depth profile of 5 sequences of depositions on the test wafer isshown in graph 200 of FIG. 2. The two large peaks in FIG. 2 correspondto, respectively, the level of autodoping without any undoped siliconcapping layer and with only a 100 Å undoped silicon capping layer.However, substantially only background levels of phosphorus are observedwhen a 200 Å or greater thickness undoped silicon cap is deposited afterthe doped silicon deposition. Hence, for a 1000 Å phosphorus-dopedsilicon layer, an undoped silicon capping layer having a thickness of200 Å or greater is sufficient to reduce the effects of autodoping to asubstantially background level.

[0030] Referring now to FIG. 3, the results of capping boron-doped(p-type) silicon depositions will now be discussed. In this regard,polycrystalline silicon doped to 1×10²⁰ atoms/cm³ boron was deposited at550° C. by flowing 500 sccm (standard cubic centimeters) of SiH₄ and 100sccm of 0.5% BCl₃ diluted in He with 300 sccm of He carrier gas.Pressure in the quartz tube was 400 mTorr and the resulting depositionrate was approximately 32.1 Å/minute. Undoped silicon was deposited at550° C. by flowing 500 sccm of SiH₄ at 400 mTorr and the resultingdeposition rate was approximately 21.7 Å/minute. The resulting SIMSdepth profile of the test wafer is shown in graph 300 of FIG. 3. In FIG.3, it is evident that a 300 or 400 Å undoped silicon capping layer issufficient to decrease the effects of autodoping. Hence, for a 1000 Åboron-doped silicon layer, an undoped silicon capping layer having athickness of 300 Å or greater is sufficient to reduce the effects ofautodoping to a substantially background level.

[0031] Given the procedures outlined above, it is possible to determinethe appropriate undoped silicon capping layer thickness for dopedsilicon layers having thicknesses of more or less than 1000 Å. Forexample, undoped silicon capping layer thicknesses of up to 500, 1000,or 5000 Å may be appropriate depending on the concentration and type ofdopant present in the doped silicon layers.

[0032] It should also be noted that the undoped silicon capping layerscan be advantageously consumed or removed during subsequent processing.For example, the formation of TiSi₂ wires to access, for example, adiode semiconductor structure, requires deposition of titanium (Ti) onthe doped silicon (Si) films with undoped caps. Subsequent thermalprocessing of the wafers reacts the Ti with Si, forming low resistivityTiSi₂. Each unit of Ti thickness deposited consumes approximately 2units of Si to form TiSi₂. Hence, a process that deposits, for example,250 Å Ti consumes approximately 500 Å of undoped silicon to form TiSi₂.Hence, a 200 Å undoped silicon capping layer on a phosphorus-dopedsilicon layer or a 300 Å undoped silicon capping layer on a boron-dopedsilicon layer would be consumed by this process leaving only highlydoped silicon in contact with the TiSi₂.

[0033] Another process that consumes or removes the undoped siliconcapping layer is chemo-mechanical polishing (CMP) that is required afterdeposition of oxide insulating layers. Oxide layers isolate conductivelayers from one another and enable additional depositions to be put downon top of these structures. Since the oxide deposition is ubiquitous,that is, it not only covers the silicon structures but also fills thevalleys in between, chemo-mechanical polishing is employed to planarizethis bumpy or uneven deposition before subsequent depositions can beplaced thereon. Generally, chemo-mechanical polishing removes the oxideon top of the silicon structures (e.g., wires), but does not remove thestructures themselves. However, due to the thinness of the oxide layeron top of the silicon structures, it is difficult to stop thechemo-mechanical polishing process at the atomic interface of siliconoxide and silicon interface (i.e., SiO₂/Si interface). Nevertheless, itis important that all of the oxide be fully removed from the top of thesilicon structures to allow for further device fabrication. Hence,overpolishing is employed where a quantity of silicon of the siliconstructure is also removed. The exact quantity of silicon removed byoverpolishing depends on, at least partly, the uniformity of the oxidefilm deposition and the resolving power or accuracy of thechemo-mechanical polishing tool. Typical overpolish ranges includeanywhere between approximately 200 and 1500 Å. After chemo-mechanicalpolishing, the resulting wafer is a planar sheet of alternating siliconwires and insulating oxide (SiO₂) portions. Hence, if the overpolish isset for at least 500 Å, the undoped silicon capping layer on eitherboron or phosphorus-doped silicon films is consumed leaving behind onlythe desired highly doped silicon film. As described above, thisprocedure is employed on appropriate silicon layers that have beenoxidized and preferably not every silicon layer.

[0034] Numerous electronic devices can be formed according to thepresent invention including resistors, capacitors, diodes, memorydevices, and electro-optical devices. For example, one particular typeof electronic device includes three-dimensional memory devices asdisclosed in co-pending U.S. patent application Ser. No. 09/560,626titled “Three-Dimensional Memory Array and Method of Fabrication,” filedApr. 28, 2000, which is hereby fully incorporated by reference. Anotherexample includes nonvolatile memory devices as disclosed in U.S. Pat.No. 6,034,882 titled “Vertically Stacked Field Programmable NonvolatileMemory and Method of Fabrication,” issued on Mar. 7, 2000, which ishereby fully incorporated by reference. Still other examples includeHBTs (heterojunction bipolar transistors) and TFTs (thin-filmtransistors), which can be formed by alternating layers of crystallinesilicon (Si) with different doping types.

[0035] While the present invention has been illustrated by thedescription of embodiments thereof, and while the embodiments have beendescribed in considerable detail, it is not the intention of theapplicants to restrict or in any way limit the scope of the appendedclaims to such detail. Additional advantages and modifications willreadily appear to those skilled in the art. For example, undoped siliconcapping layer thicknesses in excess or 200 or 300 Å can be employed toreduce the effects of autodoping, depending on the thickness of thedoped silicon layers. Therefore, the invention, in its broader aspects,is not limited to the specific details, the representative apparatus,and illustrative examples shown and described. Accordingly, departurescan be made from such details without departing from the spirit or scopeof the applicant's general inventive concept.

What is claimed is:
 1. A method of making a semiconductor devicecomprising: forming a first in-situ doped silicon layer over a substratematerial in a pressure vessel while introducing a precursor gas; withoutremoving the substrate material from the pressure vessel, discontinuingintroduction of the precursor gas and forming an undoped silicon cappinglayer on and in contact with the doped silicon layer; and removing theundoped silicon capping layer.
 2. The method of claim 1 wherein theundoped silicon capping layer is removed by CMP.
 3. The method of claim1 further comprising, after the step of removing the undoped siliconcapping layer, depositing a second in-situ doped silicon layer.
 4. Themethod of claim 3 wherein the first doped layer is formed with an n-typedopant or a p-type dopant, and the second doped layer is formed with ap-type dopant or an n-type dopant, the type of the second layer oppositethe type of the first doped layer.
 5. The method of claim 3 wherein thedoped layers form a portion of a memory device.
 6. The method of claim 5wherein the memory device forms a portion of a three dimensional memoryarray.
 7. A method of conditioning a pressure vessel to preventautodoping, the method comprising the steps of: forming a first dopedsilicon layer in the pressure vessel over a surface of a first waferwhile introducing a precursor gas; without removing the first wafer fromthe pressure vessel, discontinuing introduction of the precursor gas andforming an undoped silicon capping layer on and in contact with thefirst doped silicon layer and on exposed surfaces in the pressurevessel; and introducing a second wafer into the pressure vessel afterformation of the undoped capping layer and forming a second siliconlayer over a surface of the second wafer, wherein the thickness of theundoped capping layer is sufficient to reduce autodoping in the secondsilicon layer to approximately a background level.
 8. The method ofclaim 7 wherein the undoped silicon capping layer, when formation iscomplete, is thinner than the first doped layer.
 9. The method of claim8 wherein the thickness of the undoped silicon capping layer is about500 angstroms or less.
 10. The method of claim 8 wherein the thicknessof the undoped silicon capping layer is between about 500 angstroms orand about 200 angstroms.
 11. The method of claim 7 wherein the secondsilicon layer is undoped.
 12. The method of claim 7 wherein the firstdoped layer is formed with an n-type dopant or a p-type dopant, and thesecond layer is formed with a p-type dopant or an n-type dopant, thetype of the second layer opposite the type of the first doped layer. 13.The method of claim 7 wherein the first or the second silicon layerforms a portion of a memory device.
 14. The method of claim 13 whereinthe memory device forms a portion of a three dimensional memory array.15. A method of making a silicon-based electronic device comprising thesteps of: forming a first doped silicon layer in a pressure vessel overa surface of a product wafer substrate material while introducing aprecursor gas; without removing the substrate material from the pressurevessel, discontinuing introduction of the precursor gas and forming anundoped silicon capping layer on and in contact with the first dopedsilicon layer; and forming a second doped silicon layer on and incontact with the undoped silicon capping layer, wherein the layers forma portion of a memory device.
 16. The method of claim 15 wherein thememory device is a portion of a three dimensional memory array.
 17. Themethod of claim 16 wherein the undoped capping layer when formed isthinner than the first doped layer.
 18. The method of claim 17 whereinthe thickness of the undoped capping layer is between about 500 andabout 200 angstroms.
 19. The method of claim 15 wherein the first dopedlayer is formed with an n-type dopant or a p-type dopant, and the seconddoped layer is formed with a p-type dopant or an n-type dopant, the typeof the second doped layer opposite the type of the first doped layer.20. A method of making a silicon-based electronic device comprising thesteps of: forming a first doped silicon layer in a pressure vessel overa surface of a product wafer substrate material while introducing aprecursor gas; and without removing the substrate material from thepressure vessel, discontinuing introduction of the precursor gas andforming an undoped silicon capping layer on and in contact with thefirst doped silicon layer, wherein the layers form a portion of a threedimensional memory array.
 21. The method of claim 20 wherein the undopedcapping layer is thinner than the first doped layer.
 22. The method ofclaim 21 wherein the thickness of the undoped capping layer is betweenabout 500 and about 200 angstroms.
 23. The method of claim 20 furthercomprising forming a second doped layer on and in contact with theundoped capping layer.
 24. The method of claim 23 wherein the firstdoped layer is formed with n-type or p-type dopants and the second layeris formed with n-type or p-type dopants, the type of the second layeropposite the type of the first layer.
 25. A method of making asemiconductor device comprising: forming a first in-situ doped siliconlayer over a substrate material in a pressure vessel while introducing aprecursor gas; without removing the substrate material from the pressurevessel, discontinuing introduction of the precursor gas and forming anundoped silicon capping layer on the doped silicon layer; and consumingor removing the undoped silicon capping layer, wherein the semiconductordevice is a memory device.
 26. The method of claim 25, wherein theundoped silicon capping layer is removed by CMP.
 27. The method of claim25, wherein the undoped silicon capping layer is reactively consumed.28. The method of claim 25, further comprising, after the step ofconsuming or removing the undoped silicon capping layer, depositing asecond in-situ doped silicon layer.
 29. The method of claim 25, whereinthe memory device is a portion of a three dimensional memory array. 30.The method of claim 25 wherein the undoped capping layer, when formed,is thinner than the first doped layer.
 31. The method of claim 30wherein the thickness of the undoped capping layer is between about 500and about 200 angstroms.